---
name: easyeda-project
description: Operate on or verify a named EasyEDA Pro schematic or PCB. Use for live project reads, authorized edits, saves, exports, DRC/check, layout review, and acceptance evidence; choose the live-operation or quality-gates mode explicitly.
---

# EasyEDA Project

This is the project entry skill for EasyEDA Pro work. It combines two modes that
must remain separate in the same run:

- **Live operation** — connect to the currently open EasyEDA Pro project and,
  only with authorization, read or mutate schematic/PCB data through the typed
  CLI, daemon, and connector.
- **Quality gates** — freeze scope, inspect source data, classify DRC/check and
  layout findings, and decide whether evidence supports completion. This mode
  does not connect to EasyEDA or mutate a project by itself.

## Mode selection

Choose live operation when the request needs the active EasyEDA window, named
document reads, placement, wiring, layout, synchronization, saving, or export.
Read [live-operation](references/live/REFERENCE.md) and only its relevant references.

For a current EasyEDA Pro GUI workflow, load only the document-specific local
supplement after the live-operation router:

- schematic, library association, bus, simulation, or schematic-to-PCB update:
  [practical schematic workflows](references/live/references/practical-schematic-workflows.md)
- PCB setup, rule synchronization, pours, DRC, or manufacturing export:
  [practical PCB workflows](references/live/references/practical-pcb-workflows.md)
- Gerber/BOM/coordinates, assembly assistance, physical bring-up, or explicitly authorized order preparation:
  [manufacturing and bring-up](references/live/references/manufacturing-and-bring-up.md)

These supplements retain the useful concrete menu/mouse paths from earlier UI
versions as preferred routes. If a current window differs, locate the same
semantic command visually before proceeding; they do not replace the upstream
typed-action references or the specialized design Skills.

Choose quality gates when the request is an audit, review, final verification,
or acceptance decision for a named schematic or PCB. Read [quality-gates](references/quality/REFERENCE.md)
and only its relevant references.

If a task needs both, run them as two explicit phases: live operation first,
then read-back and quality gates. Do not claim design acceptance merely because
the live operation or daemon succeeded.

## Shared boundaries

- Establish the exact project, document, page, and document type before scoped
  work.
- Preserve the user's target and authorization boundary; ask before destructive
  or broad changes.
- Use typed operations and fresh read-back evidence. Treat screenshots as
  visual evidence, not electrical proof.
- Report whether the project was accessed, changed, saved, or only reviewed.

## Design-skill handoff

Keep design judgment in the three specialized Skills:

- hardware-architecture: system requirements, architecture, power tree, interface/resource contracts, candidate parts, cost and risk.
- schematic-design: circuit calculations, exact pins and values, symbol/footprint mapping, net intent, ERC/DRC and schematic readability.
- pcb-layout: board outline, stackup, placement, routing, return paths, copper, thermal, DFM, Gerber and assembly.

The live-operation bundle contains the official v1.1.1 reference corpus used by these Skills. They may load the relevant upstream references progressively; do not copy the entire corpus into every design Skill. A design Skill judges whether the design is correct; this Skill only provides the authorized project connection/read-back or the separate quality-gates evidence phase.

## Completion

The task is complete only when the selected mode's evidence is present, every
requested output is accounted for, unresolved findings are classified, and the
report does not confuse connection success with design acceptance.
